1. Field of the Invention
The present invention relates to single crystal silicon typically for use as a substrate of semiconductor integrated circuits. More particularly, the invention is directed to such single crystal silicon in which contamination with certain specific impurities is minimized in the bulk of the substrate so that stacking faults induced on main or front surfaces during thermal oxidation are reduced substantially to zero.
2. Description of the Prior Art
Thermal oxidation is commonly accepted as a requisite of processing integrated circuits, particularly those of an MOS type. Oxygen-induced stacking faults referred to simply as OSF which have developed while the single crystal silicon is treated at elevated temperature, are found to significantly contribute to the electrical characteristics of the integrated circuit to be formed. OSF, therefore, has heretofore been a great concern in the electronics industry.
OSF are generally known to grow in an oxidative atmosphere and to reduce under a non-oxidative condition. This type of fault is reportedly attributable to (a) mechanical strains induced during wafer fabrication, (b) point defects developed and accumulated in heat processing, (c) defects due to ion implantation, (d) surface contaminations with Na, and (e) surface defects such as so-called swirl defects and bulk defects originating from dissolved oxygen deposition.
The surface and bulk defects among those factors are closely associated with various IG treatments effected initially in the production of integrated circuits from silicon wafers. The IG treatments are effective to prevent the wafer from getting involved in OSF as they are capable of rendering the wafer fully free from oxygen-induced minute defects at the active surface layer. It has been further proposed, as taught for instance by Japanese Patent Laid-open Publication No. 55-56098, that oxygen-induced bulk defects in the bulk of single crystal silicon can be prohibited by controlling the thermal history of single crystal silicon during the period of time when the latter material is being pulled by the Czochralski method. This prior process is intended to subject a rod of single crystal silicon, just following the whole growth process to a temperature in the region of 900.degree. to 500.degree. C. in the furnace chamber for not longer than 4 hours and thereafter cooling such rod at a cooling speed of not lower than 100.degree. C. per hour.
The surface and bulk defects would also be expected to result from contamination with metallic impurities. To this end, many attempts have been made to examine and detect those contaminants introduced in single crystal silicon, as disclosed in the following publications. However, none of them make a detailed analysis of the correlation between the individual metals and the OSF levels.
1. P. F. Schmit et al, "Solid-state Science and Technology", J. Electrochem. Soc., p.632 (1981) PA1 2. Nakajima and Ohara, "Chemical Analyses of Semiconductors", Ohyo Butsuri, Vol. 43, No. 5, p.438 (1974) PA1 3. Nakajima, Bando and Nakayama, "Neutron Activation Analyses of Impurities in Highly Pure Silicon Semiconductors", Bunseki Kiki, Vol. 6, No. 9, p572 (1968) PA1 4 Shirai, "Pulling Technology of Single Crystal Silicons", Zairyo Gijutsu, Vol. 2, No. 1, p.41 (1984)
Neutron activation analysis allows a limited group of metals such as Au to be detected in the order of ppta but fails to measure various other metals up to such level of concentration.
Under the above state of technologies, there has been left unsolved the technical problem of holding OSF a substantially nil level in single crystal silicon.